By Robert W. Brodersen (auth.), Robert W. Brodersen (eds.)
A silicon compiler is a software program approach that could instantly generate an built-in circuit from a user's specification.
Anatomy of a Silicon Compiler examines one such compiler intimately, protecting the elemental framework and layout access, the particular algorithms and libraries that are used, the method of verification and trying out, behavioral synthesis instruments and several other functions which exhibit the system's functions.
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Extra info for Anatomy of a Silicon Compiler
4 shows the top-level schematic of the TicTacToe chip; the move block is just one component of the top-level schematic. The TERM_EDGE attribute on each terminal is used by the standard cell layout generator to control terminal placement on the generated layout. Note that the "-flatten" option is passed to the Stdcell layout generator; this causes the Stdcell script to flatten the standard cell hierarchy before attempting layout generation. 5 shows a pad frame created with the schematic interface for the TicTacToe chip.
Tools such as oct2rinf, an interface to a commercial PCB router, allow the designer to define parameterized placement hints. The structure of a design can be controlled by parameters. In the simplest case, an instance or net can be included conditionally into a design by placing a CONDITIONAL property with a LightLisp value under the OCT object in question. For the above net in an SDL file, this might appear as follows: (net wire (CONDITIONAL (> wI» ( (parent top_input) (Dl input) 30 Framework and Design Entry Part I A zero or nil value will cause the object to be eliminated when a design instance is produced.
C. Berkeley Electronics Research Laboratory, Berkeley. California, January 1990 [Shung88] C. D dissertation. University of California at Berkeley, June 1988 [E1A87] Electronic Industries Association. 0," Electronic Industries Association, 1987. Lager OCT Policy and the SOL Language Brian C. Richards The OCT database, described in the preceding chapter, provides a mechanism for storing system design information, without imposing rigid rules for specifying a design. Instead, guidelines or policies are offered, recommending certain conventions for representing different types of design information.
Anatomy of a Silicon Compiler by Robert W. Brodersen (auth.), Robert W. Brodersen (eds.)