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Download e-book for iPad: Algorithm Engineering and Experimentation: International by Ruy Luiz Milidiú, Artur Alves Pessoa, Eduardo Sany Laber

By Ruy Luiz Milidiú, Artur Alves Pessoa, Eduardo Sany Laber (auth.), Michael T. Goodrich, Catherine C. McGeoch (eds.)

ISBN-10: 354048518X

ISBN-13: 9783540485186

ISBN-10: 3540662278

ISBN-13: 9783540662273

Symmetric multiprocessors (SMPs) dominate the high-end server industry and are at the moment the first candidate for developing huge scale multiprocessor platforms. but, the layout of e cient parallel algorithms for this platform c- rently poses a number of demanding situations. the reason is, the quick growth in microprocessor pace has left major reminiscence entry because the basic issue to SMP functionality. for the reason that reminiscence is the bottleneck, easily expanding the n- ber of processors won't unavoidably yield greater functionality. certainly, reminiscence bus obstacles normally restrict the dimensions of SMPs to sixteen processors. This has no less than twoimplicationsfor the algorithmdesigner. First, because there are quite few processors availableon an SMP, any parallel set of rules needs to be aggressive with its sequential counterpart with as low as one processor on the way to be r- evant. moment, for the parallel set of rules to scale with the variety of processors, it has to be designed with cautious realization to minimizing the quantity and kind of major reminiscence accesses. during this paper, we current a computational version for designing e cient al- rithms for symmetric multiprocessors. We then use this version to create e cient ideas to 2 greatly di erent sorts of difficulties - associated checklist pre x com- tations and generalized sorting. either difficulties are reminiscence extensive, yet in die lease methods. while generalized sorting algorithms often require a wide numberofmemoryaccesses, they areusuallytocontiguousmemorylocations. against this, prex computation algorithms quite often require a extra modest qu- tity of reminiscence accesses, yet they're are typically to non-contiguous reminiscence locations.

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Read Online or Download Algorithm Engineering and Experimentation: International Workshop ALENEX’99 Baltimore, MD, USA, January 15–16, 1999 Selected Papers PDF

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Extra resources for Algorithm Engineering and Experimentation: International Workshop ALENEX’99 Baltimore, MD, USA, January 15–16, 1999 Selected Papers

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Gr¨ otschel and O. Holland, Solving matching problems with linear programming, Math. Prog. 33 (1985), 243–259. Mar79. A. B. D. thesis, The John Hopkins University, Baltimore, 1979. Mil95. D. L. Miller, A matching based exact algorithm for capacitated vehicle routing problems, ORSA J. of Computing (1995), 1–9. MM97. R. H. M¨ ohring and M. M¨ uller-Hannemann, Complexity and modeling aspects of mesh refinement into quadrilaterals, Proceedings of the 8th Annual International Symposium on Algorithms and Computation, ISAAC’97, Singapore, Lecture Notes in Computer Science 1350, Springer-Verlag, 1997, pp.

Prefix data. Since this modified algorithm requires no more than approximately n noncontiguous memory accesses while running in O(n) computation time, it is optimal according to our model. Designing Practical Efficient Algorithms 43 The first fast parallel algorithm for prefix computations was probably the list ranking algorithm of Wyllie [18], which requires at least n log n non-contiguous accesses. Other parallel algorithms which improved upon this result include those of Vishkin [16] (5n non-contiguous accesses), Anderson and Miller [5] (4n noncontiguous accesses), and Reid-Miller and Blelloch [13] (2n non-contiguous accesses - see [8] for details of this analysis).

However, it is important to note that an ns -biased binomial process requires on average ns events before encountering the first success and so on average each processor traverses about np list elements (which is what we observe experimentally in the next section). In Step (5), processor P0 traverses the the linked list of s records in the Sublists array established in Step (4) to compute their prefix values, which requires s non-contiguous memory accesses to exchange s elements with main memory and O (s) computation time.

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Algorithm Engineering and Experimentation: International Workshop ALENEX’99 Baltimore, MD, USA, January 15–16, 1999 Selected Papers by Ruy Luiz Milidiú, Artur Alves Pessoa, Eduardo Sany Laber (auth.), Michael T. Goodrich, Catherine C. McGeoch (eds.)


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